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74F109SJ

Dual JK Positive Edge-Triggered Flip-Flop

GeneralDescription TheF109consistsoftwohigh-speed,completelyindependenttransitionclockedJKflip-flops.Theclockingoperationisindependentofriseandfalltimesoftheclockwaveform.TheJKdesignallowsoperationasaD-typeflip-flop(refertoF74datasheet)byconnectingtheJ

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F10PC

Triple 3-Input NAND Gate

GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicNANDfunction.

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F10SC

Triple 3-Input NAND Gate

GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicNANDfunction.

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F10SJ

Triple 3-Input NAND Gate

GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicNANDfunction.

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F11

Triple 3-Input AND Gate

GeneralDescription Thisdevicecontainsthreeindependentgates,eachofwhichperformsthelogicANDfunction.

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F11

Triple 3-input NAND gate

74F10Triple3-inputNANDgate 74F11Triple3-inputANDgate

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74F112

Dual J-K negative edge-triggered flip-flop

DESCRIPTION The74F112,DualNegativeEdge-TriggeredJK-TypeFlip-Flop,featureindividualJ,K,Clock(CPn),Set(SD)andReset(RD)inputs,true(Qn)andcomplementary(Qn)outputs. TheSDandRDinputs,whenLow,setorresettheoutputsasshownintheFunctionTable,regardlessofthelevel

PhilipsNXP Semiconductors

飛利浦荷蘭皇家飛利浦

74F112

Dual JK Negative Edge-Triggered Flip-Flop

GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F112PC

Dual JK Negative Edge-Triggered Flip-Flop

GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

74F112SC

Dual JK Negative Edge-Triggered Flip-Flop

GeneralDescription The74F112containstwoindependent,high-speedJKflipflopswithDirectSetandClearinputs.Synchronousstatechangesareinitiatedbythefallingedgeoftheclock.Triggeringoccursatavoltageleveloftheclockandisnotdirectlyrelatedtothetransitiontime.TheJ

FairchildFairchild Semiconductor

仙童半導(dǎo)體飛兆/仙童半導(dǎo)體公司

詳細(xì)參數(shù)

  • 型號：

    74F

  • 制造商：

    BOURNS

  • 制造商全稱：

    Bourns Electronic Solutions

  • 功能描述：

    High Q, high self-resonant frequency Varnish coated

供應(yīng)商型號品牌批號封裝庫存備注價格
BUS
24+
65
詢價
FSC
2016+
DIP14
2500
只做原裝,假一罰十,公司可開17%增值稅發(fā)票!
 詢價
PHIL
24+/25+
1129
原裝正品現(xiàn)貨庫存價優(yōu)
 詢價
ON
23+
TSSOP14
27168
原裝正品,假一罰十
 詢價
IDT
SSOP
6688
341
現(xiàn)貨庫存
 詢價
PHI
00+/01+
NULL
253
全新原裝100真實(shí)現(xiàn)貨供應(yīng)
 詢價
FAIRCHILD
0112+
SOP16
2255
全新原裝進(jìn)口自己庫存優(yōu)勢
 詢價
ON
25+
TO-220
5025
⊙⊙新加坡大量現(xiàn)貨庫存,深圳常備現(xiàn)貨!歡迎查詢!⊙
 詢價
NS/國半
1950+
DIP14
6852
只做原裝正品現(xiàn)貨!或訂貨假一賠十!
 詢價
TI
23+
SOP
8890
價格優(yōu)勢、原裝現(xiàn)貨、客戶至上。歡迎廣大客戶來電查詢
 詢價
更多74F供應(yīng)商 更新時間2025-4-20 16:30:00

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