74AVC16834ADGG集成電路（IC）的通用總線功能規(guī)格書PDF中文資料

1. General description

The 74AVC16834A is an 18-bit universal bus driver. Data flow is controlled by output enable (OE),

latch enable (LE) and clock inputs (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of

power consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC

through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive

during transient. See Fig. 5 for typical curves.

2. Features and benefits

? Wide supply voltage range from 1.2 V to 3.6 V

? Complies with JEDEC standards:

? JESD8-7 (1.2 V to 1.95 V)

? JESD8-5 (1.8 V to 2.7 V)

? JESD8-1A (2.7 V to 3.6 V)

? CMOS low power consumption

? Input/output tolerant up to 3.6 V

? Dynamic Controlled Output (DCO) circuit dynamically changes output impedance, resulting in

noise reduction without speed degradation

? Low inductance multiple VCC and GND pins to minimize noise and ground bounce

? Power off disables 74AVC16834A outputs, permitting Live Insertion

? Integrated input diodes to minimize input overshoot and undershoot