74ACT257集成電路（IC）的信號(hào)開關(guān)多路復(fù)用器解碼器規(guī)格書PDF中文資料

74ACT257屬于集成電路（IC）的信號(hào)開關(guān)多路復(fù)用器解碼器。由意法半導(dǎo)體集團(tuán)制造生產(chǎn)的74ACT257信號(hào)開關(guān)，多路復(fù)用器，解碼器邏輯型信號(hào)開關(guān)、多路復(fù)用器和編碼器 IC 可用于對(duì)以數(shù)字格式表示數(shù)據(jù)的電信號(hào)進(jìn)行路由和選擇。這些器件與設(shè)計(jì)用于模擬信號(hào)的類似產(chǎn)品有所不同，它們保留的信息表示為兩個(gè)電狀態(tài)之一，而不是兩個(gè)外部界限內(nèi)的無(wú)窮變化量。

DESCRIPTION

The 74ACT257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is composed of an independent 2-channel multiplexer with common SELECT and ENABLE (OE)inputs. It is a non-inverting multiplexer. When the ENABLE input is held HIGH, the outputs are forced to a high impedance state. When the SELECT input is held LOW, A data is selected; when SELECT input is held HIGH, B data is selected.

■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 4 μA(MAX.) at TA=25°C

■ COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.)

■ 50? TRANSMISSION LINE DRIVING CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN)

■ BALANCED PROPAGATION DELAYS: tPLH ? tPHL

■ OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V

■ PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257

■ IMPROVED LATCH-UP IMMUNITY