Features:

◆ True Dual-Port memory cells which allow simultaneous

access of the same memory location

◆ High-speed data access

– Commercial: 4.2ns (133MHz)(max.)

– Industrial: 4.2ns (133MHz)(max.)

◆ Selectable Pipelined or Flow-Through output mode

◆ Counter enable and repeat features

◆ Interrupt Flags

◆ Full synchronous operation on both ports

– 7.5ns cycle time, 133MHz operation (9.5Gbps bandwidth)

– 1.5ns setup to clock and 0.5ns hold on all control, data, and

address inputs @ 133MHz

– Fast 4.2ns clock to data out

– Data input, address, byte enable and control registers

– Self-timed write allows fast cycle time

◆ Separate byte controls for multiplexed bus and bus

matching compatibility

◆ Dual Cycle Deselect (DCD) for Pipelined Output Mode

◆ 2.5V (±100mV) power supply for core

◆ LVTTL compatible, selectable 3.3V (±150mV) or 2.5V

(±100mV) power supply for I/Os and control signals on

each port

◆ Includes JTAG functionality

◆ Available in a 256-pin Ball Grid Array (BGA)

◆ Common BGA footprint provides design flexibility over

seven density generations (512K to 36M-bit)

◆ Green parts available, see ordering information

70T3509MS133BPGI屬于集成電路（IC） > 存儲(chǔ)器。瑞薩科技有限公司制造生產(chǎn)的70T3509MS133BPGI存儲(chǔ)器存儲(chǔ)器是集成電路上用作數(shù)據(jù)存儲(chǔ)設(shè)備的半導(dǎo)體器件。這些器件分為非易失性或易失性兩種，格式包括 CBRAM、DRAM、EEPROM、EERAM、EPROM、閃存、FRAM、NVSRAM、PCM (PRAM)、PSRAM、RAM 和 SRAM。這些器件的存儲(chǔ)容量為 64 b 至 6 Tb 不等，接口有 I2C、MMC、并行、eMMC、串行、單線、SPI、UFS、Xccela 總線和 1-線。