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663MILF中文資料IDT數(shù)據(jù)手冊PDF規(guī)格書

663MILF
廠商型號

663MILF

功能描述

PLL BUILDING BLOCK Phase detector and VCO blocks can be used Lower power CMOS process

文件大小

218.91 Kbytes

頁面數(shù)量

8

生產(chǎn)廠商 Integrated Device Technology, Inc.
企業(yè)簡稱

IDT

中文名稱

Integrated Device Technology, Inc.官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-5 18:15:00

663MILF規(guī)格書詳情

Description

The ICS663 is a low cost Phase-Locked Loop (PLL) designed for clock synthesis and synchronization. Included on the chip are the phase detector, charge pump, Voltage Controlled Oscillator (VCO) and an output buffer. Through the use of external reference and VCO dividers (implemented with the ICS674-01, for example), the user can easily configure the device to lock to a wide variety of input frequencies.

Features

? Packaged in 8-pin SOIC (Pb free)

? Output clock range 1 MHz to 100 MHz (3.3 V), 1 MHz to 120 MHz (5 V)

? External PLL loop filter enables configuration for a wide range of input frequencies

? Ability to accept an input clock in the kHz range (video Hsync, for example)

? 25 mA output drive capability at TTL levels

? Lower power CMOS process

? +3.3 V ±5 or +5 V ±10 operating voltage

? Used along with the ICS674-01, forms a complete PLL circuit

? Phase detector and VCO blocks can be used independently for other PLL configurations

? Industrial temperature version available

? For better jitter performance, use the MK1575

產(chǎn)品屬性

  • 型號:

    663MILF

  • 功能描述:

    鎖相環(huán) - PLL PLL BUILDING BLOCK

  • RoHS:

  • 制造商:

    Silicon Labs

  • 類型:

    PLL Clock Multiplier

  • 電路數(shù)量:

    1

  • 最大輸入頻率:

    710 MHz

  • 最小輸入頻率:

    0.002 MHz

  • 輸出頻率范圍:

    0.002 MHz to 808 MHz

  • 電源電壓-最大:

    3.63 V

  • 電源電壓-最?。?/span>

    1.71 V

  • 最大工作溫度:

    + 85 C

  • 最小工作溫度:

    - 40 C

  • 封裝/箱體:

    QFN-36

  • 封裝:

    Tray

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