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54HCT163中文資料SS數(shù)據(jù)手冊(cè)PDF規(guī)格書

54HCT163
廠商型號(hào)

54HCT163

功能描述

High Speed CMOS TTL Input

文件大小

550.26 Kbytes

頁(yè)面數(shù)量

9 頁(yè)

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中文名稱

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更新時(shí)間

2025-4-10 22:50:00

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54HCT163規(guī)格書詳情

Programmable 4–bit counter with synchronous reset in bare die form

Description

The 54HCT163 programmable synchronous 4-bit decade

and binary counter is fabricated using a 2.5μm 5V CMOS

process with the same high speed performance of LSTTL

combined with CMOS low power consumption. Clock

input is active on the rising edge. Both load (SPE) and

clear (MR) inputs are active low. Presetting is synchronous

on rising clock edge. Two enable inputs (TE and PE) and

ripple carry output (TC) are provided to enable easy

cascading of counters, facilitating simple implementation

of N-bit counters without use of external gates. Device

inputs directly accept LSTTL or CMOS. All inputs are

protected against ESD and excess voltage transients.

Features:

Output Drive Capability: 10 LSTTL Loads

Low Input Current: 1μA

TTL / CMOS compatible Input Levels

Outputs directly interface CMOS, NMOS and TTL

Operating Voltage Range: 4.5V to 5.5V

Function compatible with 54LS163

Full Military Temperature Range.

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TI
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9109
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3600
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24+
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