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3D3521H中文資料DATADELAY數(shù)據(jù)手冊PDF規(guī)格書

3D3521H
廠商型號

3D3521H

功能描述

MONOLITHIC MANCHESTER ENCODER

文件大小

229.94 Kbytes

頁面數(shù)量

4

生產(chǎn)廠商 Data Delay Devices, Inc.
企業(yè)簡稱

DATADELAY

中文名稱

Data Delay Devices, Inc.官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二

更新時間

2024-11-18 13:56:00

3D3521H規(guī)格書詳情

FUNCTIONAL DESCRIPTION

The 3D3521 is a monolithic CMOS Manchester Encoder. The clock and data, present at the unit input, are combined into a single bi-phaselevel signal. In this encoding mode, a logic one is represented by a high-to-low transition within the bit cell, while a logic zero is represented by a low-to-high transition. The unit operating baud rate (in Mbaud) is equal to the input clock frequency (in MHZ). All pins marked N/C must be left unconnected.

FEATURES

? All-silicon, low-power CMOS technology

? 3.3V operation

? CMOS compatible inputs and outputs

? Vapor phase, IR and wave solderable

? Auto-insertable (DIP pkg.)

? Low ground bounce noise

? Maximum data rate: 50 MBaud

產(chǎn)品屬性

  • 型號:

    3D3521H

  • 制造商:

    DATADELAY

  • 制造商全稱:

    Data Delay Devices, Inc.

  • 功能描述:

    MONOLITHIC MANCHESTER ENCODER

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