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256MBDDRSDRAM中文資料三星數(shù)據(jù)手冊PDF規(guī)格書
256MBDDRSDRAM規(guī)格書詳情
Key Features
Features
? Double-data-rate architecture; two data transfers per clock cycle
? Bidirectional data strobe(DQS)
? Four banks operation
? Differential clock inputs(CK and CK)
? DLL aligns DQ and DQS transition with CK transition
? MRS cycle with address key programs
-. Read latency 2, 2.5 (clock)
-. Burst length (2, 4, 8)
-. Burst type (sequential & interleave)
? All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
? Data I/O transactions on both edges of data strobe
? Edge aligned data output, center aligned data input
? LDM,UDM/DM for write masking only
? Auto & Self refresh
? 7.8us refresh interval(8K/64ms refresh)
? Maximum burst refresh cycle : 8
? 66pin TSOP II package
產(chǎn)品屬性
- 型號：
256MBDDRSDRAM
- 制造商：
SAMSUNG
- 制造商全稱：
Samsung semiconductor
- 功能描述：
DDR SDRAM Specification Version 0.3
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
FAIRCHILD |
21+ |
35200 |
一級代理/放心采購 |
詢價 | |||
INTEL |
16+ |
BGA |
2500 |
進口原裝現(xiàn)貨/價格優(yōu)勢! |
詢價 | ||
INTEL |
BGA |
07+/08 |
40 |
全新原裝進口自己庫存優(yōu)勢 |
詢價 | ||
BGA |
600 |
詢價 | |||||
MICRON/美光 |
20+PB |
BGA |
60 |
20+PB |
詢價 | ||
NEC |
24+ |
BGA |
54 |
詢價 | |||
INTEL |
19+ |
BGA |
256800 |
原廠代理渠道,每一顆芯片都可追溯原廠； |
詢價 | ||
INTEL |
23+ |
BGA |
1055 |
專業(yè)優(yōu)勢供應(yīng) |
詢價 | ||
NEC |
2023+ |
BGA |
50000 |
原裝現(xiàn)貨 |
詢價 | ||
N/A |
23+ |
80000 |
專注配單,只做原裝進口現(xiàn)貨 |
詢價 |
